1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly relates to a semiconductor device that serially outputs parallel internal signals to outside.
2. Description of Related Art
Recently, synchronous DRAM (Dynamic Random Access Memory) that operates in synchronization with a clock has become the mainstream of DRAM. Although the clock speed used for the synchronous DRAM has been increasing year by year, it is impossible to increase the speed of a DRAM core (back-end circuit) proportionally to the clock frequency, because a pre-charge operation, a sense operation, and the like are necessary. Therefore, the synchronous DRAM has a “prefetch circuit” provided between the DRAM core (back-end circuit) and an interface unit (front-end circuit) that is connected to an input/output terminal and operates in synchronization with the clock frequency, and realizes an apparent high-speed operation by causing the prefetch circuit to perform parallel-to-serial conversion (see Japanese Patent Application Laid-open No. 2002-50177).
In a DDR1 synchronous DRAM, for example, the prefetch circuit performs a 2-bit prefetch, whereas in a DDR2 synchronous DRAM, the prefetch circuit performs a 4-bit prefetch. A high data transfer rate to the outside is realized in this manner.
The DDR1 and DDR2 synchronous DRAMs are basically different products because of the difference in prefetch numbers, and thus are designed, developed, and produced separately from each other. However, it is considered that the production costs can be reduced by configuring these DRAMs with the same chip and enabling to select whether it is used as the DDR1 or DDR2 synchronous DRAM. In this case, however, there is a problem as to how an internal circuit such as a pre-decoding circuit achieves compatibility.
This problem arises not only when integrating the DDR1 and DDR2 synchronous DRAMs into a single chip but also when integrating a plurality of specifications for outputting parallel internal signals serially to the outside into a single chip.